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`include "uvm_macros.svh"
import uvm_pkg::*;
class gp_extension extends uvm_tlm_extension;
rand bit enable;
rand bit [31:0] e_addr;
rand bit [31:0] e_data;
`uvm_object_utils_begin(gp_extension)
`uvm_field_int(enable, UVM_PRINT)
`uvm_field_int(e_addr, UVM_PRINT)
`uvm_field_int(e_data, UVM_PRINT)
`uvm_object_utils_end
function new(string name = "gp_extension");
super.new(name);
endfunction
endclass
class producer extends uvm_component;
uvm_tlm_generic_payload req;
gp_extension extension;
uvm_tlm_b_initiator_socket #(uvm_tlm_generic_payload) sender_port;
uvm_tlm_time tlm_delay;
`uvm_component_utils(producer)
function new(string name = "producer", uvm_component parent = null);
super.new(name, parent);
endfunction
function void build_phase(uvm_phase phase);
super.build_phase(phase);
sender_port = new("sender_port", this);
tlm_delay = new("tlm_delay", 0);
endfunction
task run_phase(uvm_phase phase);
super.run_phase(phase);
req = uvm_tlm_generic_payload::type_id::create("req");
extension = gp_extension::type_id::create("extension");
req.set_extension(extension);
assert(req.randomize with {m_address == 5;});
`uvm_info(get_name(), $sformatf("Number of extensions = %0d", req.get_num_extensions()), UVM_NONE);
`uvm_info(get_name(), $sformatf("With set_extension: req =\n%s", req.sprint()), UVM_NONE);
sender_port.b_transport(req, tlm_delay);
#5;
req.clear_extensions();
assert(req.randomize with {m_address == 7;});
`uvm_info(get_name(), $sformatf("With clear_extension: req =\n%s", req.sprint()), UVM_NONE);
endtask
endclass
class consumer extends uvm_component;
uvm_tlm_b_target_socket #(consumer, uvm_tlm_generic_payload) receiver_port;
`uvm_component_utils(consumer)
function new(string name = "consumer", uvm_component parent = null);
super.new(name, parent);
receiver_port = new("receiver_port", this);
endfunction
virtual task b_transport(uvm_tlm_generic_payload req, uvm_tlm_time tlm_delay);
`uvm_info(get_type_name(), $sformatf("Received payload =\n%s", req.sprint()), UVM_NONE);
endtask
endclass
class env extends uvm_env;
producer pro;
consumer con;
`uvm_component_utils(env)
function new(string name = "env", uvm_component parent = null);
super.new(name, parent);
endfunction
function void build_phase(uvm_phase phase);
super.build_phase(phase);
pro = producer::type_id::create("pro", this);
con = consumer::type_id::create("con", this);
endfunction
function void connect_phase(uvm_phase phase);
super.connect_phase(phase);
pro.sender_port.connect(con.receiver_port);
endfunction
endclass
class test extends uvm_test;
env env_o;
`uvm_component_utils(test)
function new(string name = "test", uvm_component parent = null);
super.new(name, parent);
endfunction
function void build_phase(uvm_phase phase);
super.build_phase(phase);
env_o = env::type_id::create("env_o", this);
endfunction
task run_phase(uvm_phase phase);
phase.raise_objection(this);
#50;
phase.drop_objection(this);
endtask
endclass
module tb_top;
initial begin
run_test("test");
end
endmodule
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// Code your design here
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