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//-------------------------------------------
// www.verificationguide.com
//-------------------------------------------
//------------------------------------------
// Including UVM Macros, Pkg and base_test
//------------------------------------------
`include "uvm_macros.svh"
import uvm_pkg::*;
`include "basic_test.sv"
module tlm_tb;
//---------------------------------------
// Calling TestCase
//---------------------------------------
initial begin
run_test("basic_test");
end
endmodule
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//-------------------------------------------
// www.verificationguide.com
//-------------------------------------------
class transaction extends uvm_sequence_item;
//---------------------------------------
// Variable Declaration
//---------------------------------------
rand bit [3:0] addr;
rand bit wr_rd;
rand bit [7:0] wdata;
//---------------------------------------
// Utility and Field macros
//---------------------------------------
`uvm_object_utils_begin(transaction)
`uvm_field_int(addr,UVM_ALL_ON)
`uvm_field_int(wr_rd,UVM_ALL_ON)
`uvm_field_int(wdata,UVM_ALL_ON)
`uvm_object_utils_end
//---------------------------------------
//Constructor
//---------------------------------------
function new(string name = "transaction");
super.new(name);
endfunction
endclass
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//-------------------------------------------
// www.verificationguide.com
//-------------------------------------------
`include "transaction.sv"
`include "component_a.sv"
`include "component_b.sv"
class environment extends uvm_env;
//---------------------------------------
// Components Instantiation
//---------------------------------------
component_a comp_a;
component_b comp_b;
`uvm_component_utils(environment)
//---------------------------------------
// Constructor
//---------------------------------------
function new(string name, uvm_component parent);
super.new(name, parent);
endfunction : new
//---------------------------------------
// build_phase - Create the components
//---------------------------------------
function void build_phase(uvm_phase phase);
super.build_phase(phase);
comp_a = component_a::type_id::create("comp_a", this);
comp_b = component_b::type_id::create("comp_b", this);
endfunction : build_phase
//---------------------------------------
// Connect_phase
//---------------------------------------
function void connect_phase(uvm_phase phase);
comp_a.trans_out.connect(comp_b.trans_in);
endfunction : connect_phase
endclass : environment
//-------------------------------------------
// www.verificationguide.com
//-------------------------------------------
class component_a extends uvm_component;
transaction trans;
uvm_blocking_put_port#(transaction) trans_out;
`uvm_component_utils(component_a)
//---------------------------------------
// Constructor
//---------------------------------------
function new(string name, uvm_component parent);
super.new(name, parent);
trans_out = new("trans_out", this);
endfunction : new
//---------------------------------------
// run_phase
//---------------------------------------
virtual task run_phase(uvm_phase phase);
phase.raise_objection(this);
trans = transaction::type_id::create("trans", this);
void'(trans.randomize());
`uvm_info(get_type_name(),$sformatf(" tranaction randomized"),UVM_LOW)
`uvm_info(get_type_name(),$sformatf(" Printing trans, \n %s",trans.sprint()),UVM_LOW)
`uvm_info(get_type_name(),$sformatf(" Before calling port put method"),UVM_LOW)
trans_out.put(trans);
`uvm_info(get_type_name(),$sformatf(" After calling port put method"),UVM_LOW)
phase.drop_objection(this);
endtask : run_phase
endclass : component_a
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//-------------------------------------------
// www.verificationguide.com
//-------------------------------------------
`include "sub_component_b_a.sv"
class component_b extends uvm_component;
sub_component_b_a sub_comp_b_a;
uvm_blocking_put_export#(transaction) trans_in;
`uvm_component_utils(component_b)
//---------------------------------------
// Constructor
//---------------------------------------
function new(string name, uvm_component parent);
super.new(name, parent);
trans_in = new("trans_in", this);
endfunction : new
//---------------------------------------
// build_phase - Create the components
//---------------------------------------
function void build_phase(uvm_phase phase);
super.build_phase(phase);
sub_comp_b_a = sub_component_b_a::type_id::create("sub_comp_b_a", this);
endfunction : build_phase
//---------------------------------------
// Connect_phase
//---------------------------------------
function void connect_phase(uvm_phase phase);
trans_in.connect(sub_comp_b_a.trans_in);
endfunction : connect_phase
endclass : component_b
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//-------------------------------------------
// www.verificationguide.com
//-------------------------------------------
`include "environment.sv"
class basic_test extends uvm_test;
`uvm_component_utils(basic_test)
//---------------------------------------
// env instance
//---------------------------------------
environment env;
//---------------------------------------
// Constructor
//---------------------------------------
function new(string name = "basic_test",uvm_component parent=null);
super.new(name,parent);
endfunction : new
//---------------------------------------
// build_phase
//---------------------------------------
virtual function void build_phase(uvm_phase phase);
super.build_phase(phase);
// Create the env
env = environment::type_id::create("env", this);
endfunction : build_phase
//---------------------------------------
// end_of_elobaration phase
//---------------------------------------
virtual function void end_of_elaboration();
//print's the topology
print();
endfunction
endclass : basic_test
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//-------------------------------------------
// www.verificationguide.com
//-------------------------------------------
class sub_component_b_a extends uvm_component;
transaction trans;
uvm_blocking_put_imp#(transaction,sub_component_b_a) trans_in;
`uvm_component_utils(sub_component_b_a)
//---------------------------------------
// Constructor
//---------------------------------------
function new(string name, uvm_component parent);
super.new(name, parent);
trans_in = new("trans_in", this);
endfunction : new
//---------------------------------------
// Imp port put method
//---------------------------------------
virtual task put(transaction trans);
`uvm_info(get_type_name(),$sformatf(" Recived trans On IMP Port"),UVM_LOW)
//#100;
`uvm_info(get_type_name(),$sformatf(" Printing trans, \n %s",trans.sprint()),UVM_LOW)
endtask
endclass : sub_component_b_a
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